Responsibilities

• Own the design and development of complex RTL blocks and micro-architectures for AI cloud systems and data centers.
• Define and implement hardware architecture from concept to production.
• Collaborate with cross-functional teams including architecture, verification, physical design and software.
• Design of IPs and SOC in a highly innovated Switch and NIC products.
• Act as a key contributor in shaping the technological direction of the new Israeli site.

Requirements:

• 5+ years of hands-on experience in RTL design and micro-architecture (SystemVerilog/Verilog).
• B.Sc. in Electrical Engineering, Computer Engineering, or a related field – required.
• M.Sc. or Ph.D. – an advantage
• Proven track record in designing high-performance, scalable digital systems.
• Background in Networking architectures and IPs (Switches, NICs and smart-NICs)
• Relevant knowledge in Networking functions like packet processing, RDMA, Ethernet Serdes, PCIe switching, MAC design etc...
• Experience with ASIC/FPGA development flows and verification methodologies.
• Strong leadership skills and ability to drive complex projects independently.
• Excellent communication skills and fluency in English.
• Job Title: Senior Design Verification Engineer