Silicon Design, Modeling, and Verification Engineers

San Jose, California, United States (On-site)

Architecture Modeling

Algorithmic and functional model development of network components (e.g. Switch, NIC, etc.)

Design Engineers

Micro-architect and Design units, sub-systems, and top-level integration of silicon network components (e.g. Switch, NIC, etc.)

Verification Engineers

Functional verification of silicon design at all levels (unit, sub-system, full-chip, multi-chip)

Senior RTL Designers

A unique opportunity to take part in building a new Israeli R&D site from the ground up.

RTL Designer

A unique opportunity to take part in building a new Israeli R&D site from the ground up.

Senior Verification Designer

A unique opportunity to take part in building a new Israeli R&D site from the ground up.

Verification Designer

A unique opportunity to take part in building a new Israeli R&D site from the ground up.

Senior RTL Integration Engineer

A unique opportunity to take part in building a new Israeli R&D site from the ground up.

Senior Frontend TFM Engineer

A unique opportunity to take part in building a new Israeli R&D site from the ground up.